Trying to achieve Exascale performance using general-purpose scalar CPUs would be a very tall problem. The World’s fastest machine is currently Tianhe-2, with a theoretical peak performance of 33 peta-flops (Pflop/s) and already consumes a whopping 24MW of power! An Exascale system will need to be at least 30 times faster, so what does that say about the power requirements? (I’ll let you do the math).
What follows is a personal opinion …
Now, here’s is a controversial question, although I am asking this with tongue firmly in cheek : Some of the world’s largest (and power hungry) supercomputers are employed to model the climate and predict the weather and so I wonder, therefore, what is the contribution of all that energy expenditure to global warming ?
Even if we could build a conventional (scalar/vector) system that big, the connectivity might be too unwieldy to actually deliver the performance, and the power requirements would be very difficult to deliver.
We need to be more responsible in our energy use, not only for the sake of the climate, but also because we will simply not be able to power these darn things unless we take the difficult road of finding revolutionary ways of doing our large scale maths. The piecemeal scaling of existing technology, I would controversially suggest, is like low hanging fruit and will only yield small (in the grand scheme of things) improvements.
One answer, I would humbly suggest, is to highlight the applications and algorithms that actually need Exascale, and then develop targeted hardware to act as co-processors to a conventional (scalar/vector) system that will control workloads and handle the IO etc, much the same way as we do with almost any co-processor now (e.g. GP-GPU).
We need disruptive and innovative technologies – and by that I mean we need to think differently from the norm of more scalar/vector cores, better connectivity, closer memory etc. All those things are important, of course, but they cannot yet promise an order of magnitude (or higher) increase in performance without significantly hiking up the energy bill.
Some technologies to watch:
FPGA – custom-designed ‘soft’ CPUs. Design your own processor logic, dedicated to your algorithm, without all the overheads and baggage of a general purpose CPU. These have been around for a long time, but the unfamiliar programming model, as well as the need to really understand what you are doing with processor design, has put most people off getting too involved. In the biotech world companies like TimeLogic have been doing this for years, but recent advances are getting very interesting indeed – check out how TGAC are getting on with Edico’s Dragen FPGA system.
Quantum computing – yes this is really out-of the-box, which is more than we can say about Schrödinger’s poor cat ! Adiabatic quantum computing could yield optimisations or mathematical shortcuts that will dramatically shorten certain classes of very difficult computational tasks. Check out this modest little 100 million fold improvement ( ! yep you read it correctly ! ) recently observed by Google using the latest D-Wave 2x machine: http://www.dwavesys.com/media-coverage/venturebeat-google-says-its-quantum-computer-more-100-million-times-faster-regular. OK this is exotic hardware needing specialist care, but its modest power consumption of only 25Kw means it could be deployed very widely.
Optical processing – no I don’t mean optical switching, although that may be of help. I really do mean optical processing – maths being done by the manipulation of light. In this case, it will address applications such as numerical simulations and also pattern matching. Check out our work with Optalysys here and here on youtube – we might reach 17 exaflops in the 2020-2022 timeframe, but with a promise of under 5KW of power needed and filling only one equipment rack. At this scale, a 1 exaflop system will probably fit on your desk and be run from a standard wall outlet !
The above are not the only disruptive technologies out there …
Best wishes and have a fabulous winter holiday/break.
Head of CiS